This invention relates to microminiature devices and, more particularly, to very-large-scale-integrated (VLSI) semiconductor devices that include a dielectric layer having closely spaced-apart contact vias formed therein.
Layers of glass such as phosphosilicate or borophosphosilicate glass are commonly utilized as dielectric materials in VLSI devices. After being deposited on a partially fabricated device, such a layer is typically planarized by heating the glass to cause it to flow. Contact vias or holes are then etched through the glass layer. Subsequently, a conductive pattern is formed on the planar top surface of the glass layer and in the vias to selectively connect the pattern to those portions of the device structure that directly underlie the vias.
In typical fabrication sequences, contact vias formed in glass layers by techniques such as reactive sputter (or ion) etching exhibit very steep (near-vertical) sidewalls. Covering the sharp edges defined by the planar top surface of the glass layer and the steep via sidewalls with a continuous and uniform layer of conductive material is a challenging requirement. To facilitate such coverage, it is common practice to reflow the apertured glass layer before depositing conductive material thereon. Such reflow of the glass rounds off the aforementioned sharp edges and decreases the steepness of the sidewalls. Reflow thus ensures that subsequently deposited conductive material will make reliable electrical connections from the top surface of the glass layer through the vias to underlying portions of the device structure.
In the course of fabricating VLSI devices with closely spaced vias formed in a glass layer, sidewall overhang in the vias was observed. Such overhang (that is, bulging and, as a result, formation of a re-entrant angle at the base of a via) threatened to prevent proper contact from being achieved in the vias and, moreover, threatened to prevent the maintenance of prescribed design rules in VLSI device structures.
Attempts by workers skilled in the art to solve the overhang problem included altering the composition of the glass layer. Additionally, the parameters of the reflow process were changed. But neither approach alone or in combination succeeded in preventing the overhang phenomenon from occurring.
Accordingly, efforts have continued by workers skilled in the art directed at trying to solve the overhang problem. It was recognized that such efforts, if successful, had the potential for contributing significantly to the realization of highly reliably VLSI devices.